Pin Configuartion

PIN CONIFGURATION

The 8086 microprocessor consists of 40 pins. Each pin has its own importance. In this post you will learn all the functions of the pins and their importance.

Pins: AD0 - AD15

These pins are acting as address bus and data bus during working cycle.

Pins: A19/S6 - A16/S3

During the process of working cycle the first part is used to output upper 4 bits. The remaining part is used to output status which indicates the type of operation to be performed.

S3 &S4 indicates segment register

S5 indicates current setting of interrupt flag

S6 Always Zero

Pins: BHE/S7

BHE stands for Bus High Enable.

If input is low in Binary system i.e. 0, it indicates at least one byte of current transfer is to be made on higher order byte AD15 - AD8, otherwise transfer to lower byte AD7 - AD0.

S7 indicates output during the later part.

Pin: NMI

It is a positive edge triggered non maskable interrupt request

Pin: INTR

It is a level triggered maskable interrupt request, if the processor should enter into interrupt service, the last clock cycle of each instruction is sampled.

Pin: CLK

Clock terminal is used for setting the prescribed time for generating signal. 8086 microprocessor requires clock signal from the external source to perform the internal operations

Processor Required clock signal

8086 5MHZ

8086-2 8MHZ

8086-1 10MHZ

Pin: RESET

This pin performs the critical action. If this pin is absent it is unable to control the microprocessor and the operation is uneasy. It clears all the segment registers. The reset sets CS (Code Segment) as FFFFH. This signal must be high for at least 4 clock cycles. When reset is remove the address registers as FFFF0H.

Pin: READY

The microprocessor is synchronize slower peripherals if the signal is low. If the signal is low it enters to wait stage.

Pin: TEST

Test signal is synchronized internally during each clock cycle. The test signal is only used by the wait instruction until a low signal on the TEST pin

Pin: RD

When 8086 microprocessor reads the data from memory the RD is low. It also acts as input or output device.

Pin: MN/MX

MN represents minimum mode

MX represents maximum mode

The 8086 microprocessor configured in minimum mode or maximum mode using this pin.

MINIMUM MODE OPERATED PINS:

Pin: INTA

INTA means Interrupt acknowledge. This pin detects the interrupts occurred in microprocessor based on two negative pulses in two consecutive bus cycle. The first pulse informs the interface, this is recognized by second pulse.

Pin: ALE

ALE means Address Latch enable. This signal is provided by 8086 to demultiplex the AD8 – AD15 into A0 - A15 and D0 – D15 using external latches.

Pin: DEN

DEN means Data Enable. This is the pin which informs to the transreceivers in the form of signals that CPU is ready to send and receive data

Pin: DT/R

DT/R means Data Transmit/ Receive. This pin is used to control the direction of data flow.

*High signal represents data is transmitting

*Low signal represents data is receiving

Pin: M/IO

This pin exclaims about memory data transfer and input, output data transfer

Pin: WR

WR means write. WR is low when 8086 is set to writing data into memory or an input/output device. In other modes it is high.

Pin: HOLD,HLDA

A high signal on HOLD pin indicates that another master is requesting to take over the system bus. On receiving HOLD signal processors outputs HLDA signal high as an acknowledgment.

A low o HOLD gives the system bus control back to the processor then outputs low signal on HLDA.

MAXIMUM MODE OPERATED PINS:

Pin: QS1, QS0

These two signals reflects the instruction queue of status which indicates the activity in queue during previous clock cycle.

QS1 QS0 Status

0 0 No operation (queue is idle)

0 1 first byte of an opcode

1 0 Queue is empty

1 1 Subsequent byte of an opcode

Pin: S2, S1, S0

These three status indicates the type of transfer such as INTA, WR, RD to be take place during current bus cycle.

S2 S1 S0 Machine cycle